git: intr: Support upto 192 IDT entries in ipl and intr vector asm cod

commit c263294b570bc9641fe5184b066fd801803046a4
Author: Sepherosa Ziehau <[e-mail]>
Date:   Thu Jan 6 23:53:19 2011 +0800

    intr: Support upto 192 IDT entries in ipl and intr vector asm code
    
    Remove 32bits gd_fpending mask and add 32bits gd_ipending mask array
    which has 6 elements.  This allows 192 intrs to be pending.
    
    192 is chosen, because the first 32 entries in IDT is reserved, while
    the last 32 entries in IDT are used for IPIs.
    
    This paves the way toward correcting interrupt routing using MPTable
    or ACPI and supporting MSI and MSI-X

Summary of changes:
 sys/cpu/i386/include/asmacros.h        |    1 +
 sys/platform/pc32/apic/apic_abi.c      |    2 +-
 sys/platform/pc32/apic/apic_vector.s   |   18 ++++---
 sys/platform/pc32/i386/genassym.c      |    2 +-
 sys/platform/pc32/i386/globals.s       |    4 +-
 sys/platform/pc32/i386/mp_machdep.c    |    2 +-
 sys/platform/pc32/icu/icu_abi.c        |    2 +-
 sys/platform/pc32/icu/icu_vector.s     |   10 ++--
 sys/platform/pc32/include/globaldata.h |    3 +-
 sys/platform/pc32/isa/ipl.s            |   93 +++++++++++++++++++++++++------
 10 files changed, 100 insertions(+), 37 deletions(-)

http://gitweb.dragonflybsd.org/dragonfly.git/commitdiff/c263294b570bc9641fe5184b066fd801803046a4


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