"i386: Add CPU_HAS_SSE2" commit

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Hi,

I just saw commit cbc5d70e... , enabling MFENCE and SFENCE on SSE2 systems,
rather than the earlier LOCK ADD [ESP], $0 for cpu_lfence and cpu_mfence.

When the Sun JVM folks were working, they found LOCK ADD was faster on Intel
systems, by a substantial amount; on AMD systems LOCK ADD was the same speed
as *FENCE, but "pipelined better", whatever that means:

http://blogs.sun.com/dave/resource/NHM-Pipeline-Blog-V2.txt

Perhaps this commit should be measured closely? I'd love to hear data either
confirming or disagreeing with Dave Dice and the Sun JVM team...

Thanks,
-- vs

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Hi,<br><br>I just saw commit cbc5d70e... , enabling MFENCE and SFENCE on SS=
E2 systems, rather than the earlier LOCK ADD [ESP], $0 for cpu_lfence and c=
pu_mfence.<br><br>When the Sun JVM folks were working, they found LOCK ADD =
was faster on Intel systems, by a substantial amount; on AMD systems LOCK A=
DD was the same speed as *FENCE, but &quot;pipelined better&quot;, whatever=
 that means:<br>

<br><a href=3D"http://blogs.sun.com/dave/resource/NHM-Pipeline-Blog-V2.txt"=
>http://blogs.sun.com/dave/resource/NHM-Pipeline-Blog-V2.txt</a><br><br>Per=
haps this commit should be measured closely? I&#39;d love to hear data eith=
er confirming or disagreeing with Dave Dice and the Sun JVM team...<br>

<br>Thanks,<br>-- vs<br>

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