[請益] Verilog-A與Cadence圖形介面的HSPICE

[pow (體脂肪35%)]

大家好
有人使用過[Cadence的圖形介面with HSPICE]+[Verilog-A behavior model]這個組合嗎?
我的Verilog-A是使用Cadence附的ahdlLib
可是怎麼弄  就是沒辦法產生netlist
error message 如下

*Error*   ERROR DETECTED IN NETLISTING, netlist bypass flag set.
*Error*   Netlist type "text.ahdl" not handled by hspiceS
             component   : not_gate
             named       : /I566
             in cellview : test/schematic
             of library  : test
*Error* artIsCallablep: argument #1 should be either a string or a symbol
(type template = "S") - nil


我使用[Cadence的圖形介面with Spectre]+[Verilog-A behavior model]
還有[手寫netlist的HPICE]+[Verilog-A behavior model]
都沒遇過問題...


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