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On Sun, 14 Mar 2004 15:41, David Schultz wrote: > > but in short.. better branch prediction, and micro-architecture > > improvments in general, and a slightly longer pipeline (for higher clocks > > vs a PIII) > > You're right that the longer pipeline allows the processor to be > clocked higher, but for a *given* speed (e.g. 1700 MHz), a longer > pipeline is actyually a disadvantage; longer pipelines cause more > stalls and higher branch misprediction costs. The better branch > predition merely attempts to hide the penalty of the longer > pipeline. I don't know why the Centrino performs better than the > Athlon in this case, though. If you really care, you'll probably > have to factor the benchmark into specific, simple tests that > demonstrate the performance difference, play with compiler > optimizations, etc. I said the longer pipeline was for higher clocks, the improved branch prediction could have a benefit over and above the penalty imposed by a longer pipeline, but as always I would imagine it would depend on the type of code being run through it :) -- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 9A8C 569F 685A D928 5140 AE4B 319B 41F4 5D17 FDD5 _______________________________________________ freebsd-chat@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-chat To unsubscribe, send any mail to "freebsd-chat-unsubscribe@freebsd.org"