Re: [patch] Intel SATA controller hiccups, locking

Thank you for looking into it!  I would really like to get Alexander's =
feedback before it gets committed.

-Andrew

On Jul 20, 2011, at 4:18 PM, Vogel, Jack wrote:

> Ran it by the chipset contact internally and he said go for it, you =
need me to check it in Andrew?
>=20
> Jack
>=20
>=20
> -----Original Message-----
> From: Andrew Boyer [mailto:[e-mail]]=20
> Sent: Wednesday, July 20, 2011 7:45 AM
> To: [e-mail]
> Cc: [e-mail]; Vogel, Jack
> Subject: [patch] Intel SATA controller hiccups, locking
>=20
> Hello Alexander,
> I am using the latest ata driver from stable/8 on a system with an =
Intel ICH10 controller.  ATA_CAM and ATA_STATIC_ID are both off.  There =
is one drive connected to port 3.  SATA is set to Enhanced / IDE mode =
(not AHCI) in the BIOS.
>> atapci0@pci0:0:31:2:	class=3D0x01018f card=3D0x060d15d9 =
chip=3D0x3a208086 rev=3D0x00 hdr=3D0x00
>> atapci1@pci0:0:31:5:	class=3D0x010185 card=3D0x060d15d9 =
chip=3D0x3a268086 rev=3D0x00 hdr=3D0x00
>=20
>> atapci0: <Intel ICH10 SATA300 controller> port =
0xbff0-0xbff7,0xbf7c-0xbf7f,0xbfe0-0xbfe7,0xbef4-0xbef7,0xbfa0-0xbfaf,0xbf=
60-0xbf6f irq 19 at device 31.2 on pci0
>> atapci0: Reserved 0x10 bytes for rid 0x20 type 4 at 0xbfa0
>> atapci0: [MPSAFE]
>> atapci0: [ITHREAD]
>> atapci0: Reserved 0x10 bytes for rid 0x24 type 4 at 0xbf60
>> ata2: <ATA channel 0> on atapci0
>> atapci0: Reserved 0x8 bytes for rid 0x10 type 4 at 0xbff0
>> atapci0: Reserved 0x4 bytes for rid 0x14 type 4 at 0xbf7c
>> ata2: SATA reset: ports status=3D0x00
>> ata2: p0: SATA connect timeout status=3D00000000
>> ata2: p1: SATA connect timeout status=3D00000000
>> ata2: [MPSAFE]
>> ata2: [ITHREAD]
>> ata3: <ATA channel 1> on atapci0
>> atapci0: Reserved 0x8 bytes for rid 0x18 type 4 at 0xbfe0
>> atapci0: Reserved 0x4 bytes for rid 0x1c type 4 at 0xbef4
>> ata3: SATA reset: ports status=3D0x08
>> ata3: p0: SATA connect timeout status=3D00000000
>> ata3: p1: SATA connect time=3D0ms status=3D00000123
>> ata3: reset tp1 mask=3D03 ostat0=3D7f ostat1=3D50
>> ata3: stat0=3D0x7f err=3D0x00 lsb=3D0xff msb=3D0xff
>> ata3: stat1=3D0x50 err=3D0x01 lsb=3D0x00 msb=3D0x00
>> ata3: reset tp2 stat0=3D7f stat1=3D50 devices=3D0x2
>> ata3: [MPSAFE]
>> ata3: [ITHREAD]
>=20
>=20
> When under heavy load, the 'atacontrol mode ad0' command sometimes =
fails to determine the SATA speed; the drive appears to be missing.  I =
think the root cause is that chipsets/ata-intel.c does not do any =
locking on the ata_intel_sata_sidpr_* routines.  The (write address =
register) + (access data register) model isn't safe without locking =
because two channels share the registers.  The ata_intel_sata_cscr_* =
routines have the same problem.
>=20
> Adding a mutex to a structure stored in ctlr->chipset_data makes the =
hiccups go away; see the attached patch.  Please advise if this is =
something you would like to fix. =20
>=20
> Thank you,
>  Andrew
>=20

--------------------------------------------------
Andrew Boyer	[e-mail]




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