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Hi, Kip Macy wrote: > Isn't it everything except x86? not really. All RISC based designs need the alignment so that the CPU can fetch a CPU word in one go. CISC based designs do not have this limitiation. I also do not know of any other CISC based design which made it to mainstream. Erich > > -Kip > > On Dec 29, 2007 12:11 AM, Erich Dollansky <oceanare@pacific.net.sg> wrote: >> Hi, >> >> >> Ivan Voras wrote: >>> Hi, >>> >>> Which of the architectures FreeBSD supports (if any) have strict memory >>> alignment requirements? (in the sense that accessing a 32-bit integer >>> not aligned on a 32-bit address results in a hardware trap/exception). >>> >> isn't this the case with SPARC and Itanium? >> >> I know, they are 64 bits. >> >> Erich >> >> _______________________________________________ >> freebsd-hackers@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-hackers >> To unsubscribe, send any mail to "freebsd-hackers-unsubscribe@freebsd.org" >> > _______________________________________________ freebsd-hackers@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "freebsd-hackers-unsubscribe@freebsd.org"