Re: Architectures with strict alignment?

Ivan Voras <freebsd.org![e-mail]> wrote:

> [e-mail] wrote:
>
> > The degree to which a PowerPC imposes a strict alignment
> > requirement depends on both the particular processor model
> > and the operation being performed.
> > 
> > For ordinary integer arithmetic and logical operations, newer
> > PPC processors tend to be more tolerant (although misalignment
> > will typically carry a performance penalty) ...
>
> How would it behave in operations like
>
> x = x + 1
>
> where x is unaligned in memory? A RISC would have to load the
> value from memory, increment it and store it.

It depends on the processor type.  IIRC most of the recent ones
(7xx, 74xx) will handle it in hardware, taking a few extra cycles
to do the extra memory accesses.  Some of the older ones (403)
will take an alignment exception, which can potentially be fixed
up by a handler but at a cost of, at least, hundreds of cycles --
and only if the OS or the application has provided the handler.

I recently ran into a case where a PPC970 took an alignment
exception on something resembling this, but I think it was because
the data cache was disabled (the 970's hardware misalignment handler
being part of the cache logic).
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