on 25/08/2010 15:23 John Baldwin said the following:
> That is because machine checks for corrected errors have to be polled and the
> kernel polls once an hour. On newer Intel CPUs (such as Nehalem) there is a
> separate interrupt (CMCI) that can fire for corrected errors.
I think that on AMD it's possible to configure an interrupt for Bank 4 events as
well (perhaps other banks too), but I need to refresh my memory of BKDG.
--
Andriy Gapon
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