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On Jul 1, 2012, at 2:41 PM, Warner Losh wrote:
>=20
>> I can port that to FreeBSD. Shall I make some patches for people
>> to look at?
>=20
> Sure. I'd love to see it. I'd be happy to preview any partial work =
if you want early feedbac.
See attached. It's fully functional and in production @Juniper. I hope =
the
last sync with FreeBSD didn't break anything.
The change to sys/arm/include/cpufunc.h is needed to avoid a name class
in cxgdb(4). That driver defines a structure field called intr_disable,
which under ARM is renamed due to intr_disable being a macro. Turning
it into an inline-function resulted in undefined symbols for I32_bit and
F32_bit. Since those names are pretty bad to begin with, I added
ARM_CPSR_I32 and ARM_CPSR_F32.
BTW: we may be able to fix the duplicate symbol problem by using weak =
symbols.
For example, we have 10 definitions of "initarm". We can make them =
unique,
by renaming the functions and add a weak alias called "initarm". E.g, in
sys/arm/mv/mv_machdep.c, rename initarm to mv_initarm() and add a weak
alias for mv_initarm called initarm.
When building for Marvell SoCs, initarm will resolve to mv_initarm. When
building LINT, we only have to provide a non-weak dummy definition for
initarm (and all the others that follow the same model) and we're good =
to
go.
Maybe the dummy function could be used as a trampoline even that =
resolves
at runtime which of the SoC-specific initarm functions is to be called
based on the SoC Id?
--=20
Marcel Moolenaar
marcel@xcllnt.net
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Index: sys/arm/arm/cpufunc.c
===================================================================
--- sys/arm/arm/cpufunc.c (revision 238362)
+++ sys/arm/arm/cpufunc.c (working copy)
@@ -74,7 +74,7 @@ __FBSDID("$FreeBSD$");
#include <arm/xscale/i80321/i80321var.h>
#endif
-#if defined(CPU_XSCALE_81342)
+#if defined(CPU_XSCALE_81342) && !defined(CPU_XSCALE_80321)
#include <arm/xscale/i8134x/i81342reg.h>
#endif
Index: sys/arm/conf/Makefile
===================================================================
--- sys/arm/conf/Makefile (revision 0)
+++ sys/arm/conf/Makefile (revision 0)
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+TARGET=arm
+
+.include "${.CURDIR}/../../conf/makeLINT.mk"
Index: sys/arm/conf/NOTES
===================================================================
--- sys/arm/conf/NOTES (revision 0)
+++ sys/arm/conf/NOTES (revision 0)
@@ -0,0 +1,85 @@
+# $FreeBSD$
+
+cpu CPU_ARM9
+cpu CPU_ARM9E
+cpu CPU_FA526
+cpu CPU_SA1100
+cpu CPU_SA1110
+cpu CPU_XSCALE_80219
+cpu CPU_XSCALE_80321
+cpu CPU_XSCALE_81342
+cpu CPU_XSCALE_IXP425
+cpu CPU_XSCALE_IXP435
+cpu CPU_XSCALE_PXA2X0
+
+files "../at91/files.at91"
+files "../at91/files.at91sam9"
+files "../econa/files.econa"
+files "../mv/files.mv"
+files "../mv/discovery/files.db78xxx"
+files "../mv/kirkwood/files.kirkwood"
+files "../mv/kirkwood/files.sheevaplug"
+files "../mv/orion/files.db88f5xxx"
+files "../mv/orion/files.ts7800"
+files "../s3c2xx0/files.s3c2xx0"
+files "../sa11x0/files.sa11x0"
+files "../xscale/i80321/files.ep80219"
+files "../xscale/i80321/files.i80219"
+files "../xscale/i80321/files.i80321"
+files "../xscale/i80321/files.iq31244"
+files "../xscale/i8134x/files.crb"
+files "../xscale/i8134x/files.i81342"
+files "../xscale/ixp425/files.avila"
+files "../xscale/ixp425/files.ixp425"
+files "../xscale/pxa/files.pxa"
+
+options PHYSADDR=0x00000000
+options KERNPHYSADDR=0x00000000
+options KERNVIRTADDR=0xc0000000
+
+makeoptions LDFLAGS="-zmuldefs"
+makeoptions KERNPHYSADDR=0x00000000
+makeoptions KERNVIRTADDR=0xc0000000
+
+options FDT
+
+options SOC_MV_DISCOVERY
+options SOC_MV_KIRKWOOD
+options SOC_MV_ORION
+
+device pci
+
+device at91_board_bwct
+device at91_board_hl200
+device at91_board_hl201
+device at91_board_kb920x
+device at91_board_qila9g20
+device at91_board_sam9g20ek
+device at91_board_tsc4370
+device board_ln2410sbc
+
+nooptions SMP
+nooptions MAXCPU
+
+nooptions COMPAT_FREEBSD4
+
+nodevice fdc
+nodevice sym
+nodevice ukbd
+
+nodevice sc
+nodevice blank_saver
+nodevice daemon_saver
+nodevice dragon_saver
+nodevice fade_saver
+nodevice fire_saver
+nodevice green_saver
+nodevice logo_saver
+nodevice rain_saver
+nodevice snake_saver
+nodevice star_saver
+nodevice warp_saver
+
+nodevice pcii
+nodevice snd_cmi
+nodevice tnt4882
Index: sys/arm/include/cpufunc.h
===================================================================
--- sys/arm/include/cpufunc.h (revision 238362)
+++ sys/arm/include/cpufunc.h (working copy)
@@ -579,20 +579,36 @@ __set_cpsr_c(u_int bic, u_int eor)
return ret;
}
+#define ARM_CPSR_F32 (1 << 6) /* FIQ disable */
+#define ARM_CPSR_I32 (1 << 7) /* IRQ disable */
+
#define disable_interrupts(mask) \
- (__set_cpsr_c((mask) & (I32_bit | F32_bit), \
- (mask) & (I32_bit | F32_bit)))
+ (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32), \
+ (mask) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
#define enable_interrupts(mask) \
- (__set_cpsr_c((mask) & (I32_bit | F32_bit), 0))
+ (__set_cpsr_c((mask) & (ARM_CPSR_I32 | ARM_CPSR_F32), 0))
#define restore_interrupts(old_cpsr) \
- (__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
+ (__set_cpsr_c((ARM_CPSR_I32 | ARM_CPSR_F32), \
+ (old_cpsr) & (ARM_CPSR_I32 | ARM_CPSR_F32)))
-#define intr_disable() \
- disable_interrupts(I32_bit | F32_bit)
-#define intr_restore(s) \
- restore_interrupts(s)
+static __inline register_t
+intr_disable(void)
+{
+ register_t s;
+
+ s = disable_interrupts(ARM_CPSR_I32 | ARM_CPSR_F32);
+ return (s);
+}
+
+static __inline void
+intr_restore(register_t s)
+{
+
+ restore_interrupts(s);
+}
+
/* Functions to manipulate the CPSR. */
u_int SetCPSR(u_int bic, u_int eor);
u_int GetCPSR(void);
Index: sys/arm/mv/mvreg.h
===================================================================
--- sys/arm/mv/mvreg.h (revision 238362)
+++ sys/arm/mv/mvreg.h (working copy)
@@ -294,11 +294,10 @@
#define SAMPLE_AT_RESET 0x10
#elif defined(SOC_MV_KIRKWOOD)
#define SAMPLE_AT_RESET 0x30
-#elif defined(SOC_MV_DISCOVERY)
+#endif
+#if defined(SOC_MV_DISCOVERY)
#define SAMPLE_AT_RESET_LO 0x30
#define SAMPLE_AT_RESET_HI 0x34
-#else
-#error SOC_MV_XX not defined
#endif
/*
Index: sys/arm/mv/mvwin.h
===================================================================
--- sys/arm/mv/mvwin.h (revision 238362)
+++ sys/arm/mv/mvwin.h (working copy)
@@ -173,6 +173,8 @@
#define MV_WIN_PCIE_MEM_ATTR 0x59
#define MV_WIN_PCIE_IO_TARGET 4
#define MV_WIN_PCIE_IO_ATTR 0x51
+#endif
+#if defined(SOC_MV_ORION)
#define MV_WIN_PCI_MEM_TARGET 3
#define MV_WIN_PCI_MEM_ATTR 0x59
#define MV_WIN_PCI_IO_TARGET 3
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