[理工] [計組] 關於memory的部分

[christianSK (AG)]

我想問兩個問題

98 中山資工  (題組中的一個小題)

(c)

Cache C1 is direct-mapped with 16 one-word blocks. Cache C2 is a direct-mapped

with 4 foru-word blocks. Assume that the miss penalty for C1 is 4 memory bus

clock cycles and the miss penalty for C2 is 7 memory bus clock cycles.

Assuming that the caches are initially empty, find an address list for which

C2 has a lower miss rate but spends more memory bus clock cycles on cache miss

than C1. What are the corresponding miss rates for C1 and C2 in this reference

string ?

好像跟a,b沒有關係 所以我就沒po了, 誤解的話麻煩告訴我一下 :)

不太懂題目的意思  希望有人可以教教我


96 交大電子

Virtual memory

(d) What are the benefits if a larger page size is chosen?(List at least 3.)

    What is the drawback?


Ans:

benefits: (1) more efficient to amortize the high access time

          (2) more spatial and temporal localities

          (3) smaller page table size

drawbacks: (1) more internal fragmentation

           (2) higher miss penalty

對benefits中的(1) 不太能夠理解

是指說因為page size大一次傳進來比較多的資料, 這樣可以傳比較少次的意思嗎?


謝謝大家~

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