看板 Grad-ProbAsk 關於我們 聯絡資訊
麻煩神手大大們解釋題(2)及翻譯,謝謝! Assume three 32-bit variables x,y, and z, are stored in memory with addresses A,B,C,respectivly. (1)For the "load-store"instruction set architecture processor, write down the assembly codes to computer x+y-c and then stores the result back to C. (2)Suppose that all instruction operation codes are 6 bits, memory addresses are 24bits(byte-addressable),and register addresses are 5bit. What are the code size(in terms of bits) and the total memory accesses (in terms of bytes)for the codes in(1)? Note that the total memory accesses include both instructions and data moved to or from memory.And, the memory accesses must be aligned. -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 60.245.78.202
metalalive:第一題,把x+y-c轉譯成 "load-store"指令集架構的組語 10/24 01:45
metalalive:第二題,是要求第一題中轉譯的組語,總共需要多少size 10/24 01:56
metalalive:(以bit表示), 以及這段組語中,總共從memory中存取多少 10/24 01:57
metalalive:bytes 10/24 01:57