Try to use the following multiplexers(i,e.,c=0 d=a,and c=1 d=b) to design a
combinational shifter that can shift 0-3 bits. Assume that both the input data
and output data of your shifter have 4 bits. 2 control bits are used to
determine the shift amount.
a b
| |
v v
------------------
| |
| |<---c
| |
------------------
|
v
d
問題:
想請問這題要如何寫出truth table及怎麼畫出電路圖出來？謝謝。
感謝各位耐心看完題目，謝謝。
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