※ 引述《b76516 (阿聰)》之銘言：
: 請問96清大計算機系統第13題
: 給了以下條件
: 1.A memory and bus system supporting block access of 4 words.
: 2.A 64-bit synchronous bus clocked at 200MHz ,with each 64-bit
: transfer taking 1 clock cycle , and 1 clock cycle
: required to send an address to memory
: 3.2 clock cycles needed between each bus transaction
: 4.A memory access time of 4 words is 300 ns
: 問讀取256word的頻寬
:
答案算法如下:
300nsx200MHz=60clocks 4word/64bit=2
示意圖:
1 2 2
bus ==== === ===
60
memory =======
傳4個word需 1+60+2+2=65clock
256/4=64
所以傳256個word需 65*64=4160clocks
我的問題是: 為什麼是65*64，不是60*64+1
我是依照如下課本例題算法
1 2 2 2
bus === === === ===
60 60 60 ...
memory ====== ====== ======
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