看板 NTUGIEE_EDA 關於我們 聯絡資訊
怎麼大家都搶兩篇? 一篇一篇來吧~ 就像一般 group meeting 一次選一篇吧~ ※ 引述《IJye ()》之銘言: : ※ 引述《meifc (越來越愛吃XD)》之銘言: : ※ 引述《tellux (寒川凝步)》之銘言: : //東傑把其中一篇報走了...只好換篇 : tchsu: 35.2 Timing-Driven Placement by Grid-Warping : 35.3 Faster and Better Global Placement by a : New Transportation Algorithm : elephant: Path Based Buffer Insertion : Net Weighting to Reduce Repeater Counts during Placement : Jiawei: : 12.2 Navigating Registers in Placement for Clock Network Minimization : 34.2 A Low-Latency Router Supporting Adaptivity for On-Chip Interconnects : Annika: : 23.1 Design Methodology for IC Manufacturability Based : on Regular Logic-Bricks : 23.2 Advanced Timing Analysis Based on PostOPC Extraction : of Critical Dimensions : waves: : 19.2 Robust Gate Sizing by Geometric Programming : 19.3 Circuit Optimization using Statistical Static Timing Analysis -- -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 140.112.233.88 ※ 編輯: bluetai 來自: 140.112.233.88 (07/04 23:35)
Donnie:一次選一篇 140.112.25.204 07/05