Re: paper review

[Donnie ( XD)]

剩下的:
Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits

A Methodology for Validation of Microprocessors Using Hybrid techniques

Arbitrary On-Chip Networks Design with Source Routing Switches

Incremental Circuit Simulation based on the Reinforced Selective-tracing Waveform Relaxation Algorithm

Electrical Modeling and Signal Integrity Simulation of Loadboard for high-speed BGA package Testing



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 bluetai:

 unisun: (1) Tapping Point Numerical Search for Exact Zero-Skew RLC Clock Tree Construction

 athena: (1) Floorplanning Multiple Reticles for Multi-project Wafers

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crazying: (1) Computing Control Inputs in Open Systems using SAT
          (2) Optimal Design Of CMOS LNA using Multi Objective Genetic Algorithm
donnie: (1) A VLSI LAYOUT LEGALIZATION TECHNIQUE BASED ON A GRAPH FIXING ALGORITHM
        (2) “Kreatur” A UML2SpecC Translator
gwliao: (1) Leakage and Dynamic Power Reduction for DFT Circuits Operating in Normal Mode
        (2) Design of Low-Power CMOS Op-Amps Via Non-Convex Polynomial Optimization
nextme: (1) A Partition-Based Voltage Scaling Algorithm Using Dual Supply Voltages for Low Power Designs
        (2) Fast and Accurate Peak Power Estimation Through Mixed-Level Delay Calibration
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  Jiawei: Design Migration from Peripheral ASIC Design to Aera-IO Flip-Chip Design by Chip I/O Planning and Legalization
  waves: The Fast and Accurate Worst-Case Determination with Maximum Probability
  fish: A Comparative Study of Lukes Algorithm and Modified Lukes Algorithm for Partitioning of Trees
  Mark:  A Novel Heuristic for Constructing Hexagonal Steiner Trees for Routing in VLSI
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 meifc: Improving Single-Pass Redundancy Addition and Removal
 internal: gain-based cell delay modeling
 Tien-Chang Hsu: Multilevel Large-Scale Modules Placement with Refined Neighborhood Exchange
 anna: Speeding Up Static Timing Analysis With Crosstalk: Discrete Coupling Model Centric Approach
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 enorm: Formal Presentation of Two Initial Variable Ordering
 indark:  Investigation of dynamic power consumption reduction in FPGAs
 Akilae: Automatic Low Power Optimizations during ADL-driven ASIP Design
 jinli:  A Linear Time Complexity Current Path Analysis Algorithm for ESD Protection
 hyliu:  Modified Simulated Annealing Algorithm for Large Temperature Set Applications – Simulation of VLSI Floor Planning System
 arious: ??????

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→ Donnie:發現 arious 還沒挑 XD
推 bluetai:看來可以玩瘋狂大洗牌了~ XD
※ 編輯: Donnie          來自: 140.112.25.204       (11/15 00:37)
推 enorm:(背景聲) 不要理他 XDDDDD
推 gwliao:Orz,  要玩chain moving嗎?
推 moonshade:沒人理我...教練....我想看paper
推 bluetai:求我啊~ :p
推 moonshade:耶耶...布魯太大好人XD
推 Donnie:你回在哪? 沒看到 XD
推 moonshade:MSN上~~ 偉大的藍太大人(磕頭)