格式如下，已被老闆指定的，請加註 assigned
可用 (志願1), (志願2) 的方式來選擇。
fish: (assigned) DAC 65
Fast Wire Length Estimation by Net Bundling for Block Placement
bluetai: 1. (assigned) DAC 515
Fast and Accurate Litho-Hotspot Dectection Using Range Pattern Matching
2. 等待宰割~
gwliao: (assigned) DAC 272
A H.264 HDTV Decoder Chip with Novel Physical Design Methods
planet: (assigned) DAC 305
Voltage Islands Generation in Chip Level Floorplanning Considering
Performance Constraints
tellux:
志願1. DAC 985
A New LP Based Incremental Timing Driven Placement for High
Performance Designs (這是我自己註冊拿到的)
志願2. DAC 734
Incremental Placement for Structured ASICs using the
Transportation Problem
志願3. DAC 838
Hippocrates: First-Do-No-Harm Detailed Placement
Annika:
志願1. GLSVLSI 123
Fast Floorplanning for FPGAs with Heterogenous Resources
志願2. GLSVLSI 128
Does Partitioning Matter for 3D Floorplanning?
志願3. DAC 11
Etch and Photolithography Process Interaction Effects Implication
for Device Layout Design
waves: (assigned) DAC 299
A Novel General Graph-Based Simplex Algorithm Applied to IC
Layout Compaction and Migration
Akilae:
志願1. GLSVLSI 169
DTS: A Tree Based Representation for 3D-Block Packing
志願2. GLSVLSI 115
Block Alignment in 3D Floorplan Using Layered TCG
anna:
志願1. GLSVLSI 140 GRP: A Top-down Placement Algorithm for Reducing
the Global Interconnect Count
Jinli:
志願1. GLSVLSI 126
The O-Sequence-- Representation of 3D-Floorplan Dissected by
Rectangular Walls.pdf
unisun
(assigned) TCAD 2910
Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers:
A Volume-Driven Compatibility Optimization Approach
(assigned) DAC 879
An Automated Core Power Network Closure Methodology
Crazying: (all assigned)
GLSVLSI 126
The O-Sequence-- Representation of 3D-Floorplan Dissected by
Rectangular Walls
DAC 734
Incremental Placement for Structured ASICs using the
Transportation Problem
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