[開課學院]: 資電學院
[開課系所]: 電機系
[課程名稱]:
[老師名稱]: 謝新銘 老師
[開課學期]:
[類型]: 97-2期末考
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[1]Implement the function F(A,B,C,D)=(A'+B)(B'+C+D')(A+D) by using
(a) a 4 ×16 decoder , (b) two 3 ×8 decoders , (c) a 8 ×1 multiplexer , and
(d) a 4 ×1 multiplexer.
[2]A sequential circuit with two D flip-flops, A and B ; two input ,x and y ;
and one output , z , is specified by the following next-state and output
equations : A(t+1) = x'y + xB(t)
B(t+1) = x'A(t) + xB(t)
z = A(t)
(a)Draw the logic diagram of the circuit .
(b)List the state table for the sequential circuit .
[3]A PN flip-flop has four operations : set to 1 , complement , no change ,
and clear to 0 , when inputs P and N 00,01,10,and 11,respectively. Please
(a)tabulate the characteristic table , (b) derive the characteristic equation,
(c)tabulate the excitation table , and (d) show how the PN flip-flop can be
converted to a T flip-flop .
[4]Given a sequential circuit specified by the following state diagram ,
please (a) simplify the state diagram by reducing the number of states ,
(b)design the reduced sequential circuit using T flip-flops , and (d) design
the reduced sequential circuit using PN flip-flops (refer to problem #2).
___
0/0 0/1 | | 0/1
a → b → c ←
1/0 ↓↑ 1/0 0/0 ↑ ↘ ↓ 1/0
1/0
1/0
f ← e ← d ←
|_______________________↑|__|
0/0 0/0
[5]Describe the performance of the following counter .
┌──────┐ Q1
Logic 1 ────────●─────╡J1 ╞──●──────
│ │ │ │
│ │ │ │
│ │ │ │
Count 1 ────────┼────○│＞ │ │
│ │ │ │
│ │ │ │
●─────┤K1 │ │
│ └──────┘ │
┌───┼───────────────┘
│ │
│ │
│ │ ┌──────┐ Q2
┌──────┼───┼─────╡J2 ╞─────────
│ │ │ │ │
│ │ │ │ │
│ │ │ │ │
│ ●───┼────○│＞ │
│ │ │ │ │
│ │ │ │ │
│ │ ●─────┤K2 │○──┐
│ │ │ └──────┘ │
│ ┌───┼───┼────────────────┘
│ │ │ │
│ └┬─╮│ │ ┌──────┐ Q4
│ │ ├┼───┼─────╡J4 ╞─────────
●───┴─╯│ │ │ │
│ │ │ │ │
│ │ │ │ │
│ └───┼────○│＞ │
│ │ │ │
│ │ │ │
│ └─────┤K4 │○─┐
│ └──────┘ │
└──────────────────────────┘
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