精華區beta NTU-Exam 關於我們 聯絡資訊
課程名稱︰數位系統與實驗 課程性質︰必修 課程教師︰歐陽明 開課學院:電機資訊 開課系所︰資訊工程 考試日期(年月日)︰2014/6/19 考試時限(分鐘):180 是否需發放獎勵金:是 (如未明確表示,則不予發放) 好讀 : http://www.ptt.cc/bbs/NTU-Exam/M.1403591255.A.8A5.html 試題 : 1. (5%) Convert a D flip-flop to a J-K flip-flop by adding external NAND gates. 2. (15%) Given a new flip-flop composed of two NAND gates. Figure : http://i.imgur.com/stH2PCI.png (5%) (a) What restriction must be placed on S* and R* so that P will always equal Q' (under steady-state conditions) ? (5%) (b) Construct a next-state table and derive the characteristic (next-state) equation for the flip-flop. (5%) (c) Complete the above timing diagram for this flip-flop. 3. (10%) Given a circuit shown in Fig.1, we assume that the inverters have a delay of 10 ns. Initially A = C = D = 1 and B = 0, and C changes to 0 at time 10 ns. Fig.1 : http://i.imgur.com/tGOLwi6.png (6%) (a) Draw a timing diagram and identify where the hazard occurs. (4%) (b) Modify the circuit to eliminate the hazard. 4. (20%) (10%) (a) Draw state transition diagram for a machine that recognizes the pattern "10(110)*01" in the input string. Note that (110)* denotes zero or more occurence of the pattern 110. So, both 1001 (zero occurence) and 1011011011001 (three occurence) are patterns we are looking for. For example : Input : 0010 1001 0110 1101 1001 1001 0111 Output: 0000 0001 0000 0000 0001 0000 0000 (10%) (b) Implement the design by using D flip-flops. 5. (10%) Design a sequential circuit. It has two inputs A and B, and one output Y. When the circuit sees a "101" on input A, Y will outputs the complement of B for the next 16 cycles; otherwise, Y will be 0. The circuit should ignore what A is receiving during these 16 cycles. Use positive-edge-triggered D flip-flops and a 4-bit binary counter as your building block, and below is an example patterns : Input A: 0011 0010 0110 1001 0010 1010 1110 0111 Input B: 1011 0011 1000 1111 0000 1111 1000 0011 Output Y: 0000 0000 0000 0000 1111 0000 1111 0000 6. (10%) Given two T flip-flops, add some logic circuit to them to make a counter repeating the sequence of 0, 3, 1, 2, 0, 3, 1, 2, 0...etc. 7. (10%) Figure : http://i.imgur.com/IpA9aYv.png (5%) (a) Describe what is the function performed by the following state-transition diagram. (5%) (b) Can the circuit function be performed by a circuit with fewer states ? If yes, draw the new diagram. 8. (10%) For the sequential circuit shown below Figure : http://i.imgur.com/c6yQzps.png (5%) (a) Find the next-state equation and transition table for each flip-flop (Ra, Rb, Rc). (5%) (b) Please construct a state table for the circuit. 9. (10%) For the following circuit, complete the timing diagram as far as you can, even after you no longer know the input. Figure : http://i.imgur.com/rh9XjEC.png X : 0 1 1 0 1 0 1 A : 0 B : 0 C : 0 D : 0 -- ※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 140.112.217.52 ※ 文章網址: http://www.ptt.cc/bbs/NTU-Exam/M.1403591255.A.8A5.html ※ 編輯: irritum (140.112.217.52), 06/24/2014 16:36:46