精華區beta NTU-Exam 關於我們 聯絡資訊
課程名稱︰邏輯電路 課程性質︰分組必修 課程教師︰黃乾鋼 開課學院:工學院 開課系所︰工程科學與海洋工程學系 考試日期(年月日)︰2006/11/16 考試時限(分鐘):180 是否需發放獎勵金:是 (如未明確表示,則不予發放) 試題 : (please DON't provide your answers ONLY. Inverter gate is always allowed in logic circuit diagram.) 1. (10%) Brief explanation of Terminologies: (a) Gray code (Give a 3-bit Gray code example). (b) Duality principle (c) DeMorgan's theorem (Give the dual form) (d) Canonical Form vx.Stand Form (e) Positive and Negative Logic 2. (5%) Find the 11's and 12's complement of 92A5(12) 3. (5%) How many different Boolean functions can be composed using n Boolean variables? 4. (10%) Prove the following equations algebraically, that is , using Postulates and Theorems of boolean algebra. (a) xy+x'y+yz=xy+x'z (b) (x+y)(x'+z)(y+z)=(x+y)(x'+z) 5. (10%) F(A,B,C,D)=ABC'+AB'D+BCD (a) simplify the boolean function F to sum-of-minterms and product-of-maxterms (b) simplify the boolean function F' to sum-of-products and products-of-sums. 6. (10%) F(x,y,z)=Σ(2,3,4),d(x,y,z)=Σ(0,1,5) (a) simplify the above boolean function F, together with the don;t-care conditions d, ad express the simplified function in sum of product form. (b) implement Fwith two-level NAND gates. 7. (10%) F(A,B,C,D)=Σ(0,4,8,9,10,11,12,14) (a) implement F with two-level NOR gates (b) implement F' with OR-NAND gates 8. (10%) consider the 4 types of gates: AND,OR,NAND,NOR. list the 8 degenerate forms of two-level combinations of gates.Select one of the 8 degenerate forms, and prove it can degenerate into one level. 9. (5%) Give the implement of 2-input exclusive -OR operation with 4NAND gates. Prove the implementation can be simplified to the exclusive-OR operation. 10.(10%) (a)obtain the simplified boolean expressions from outputs F and G in terms of the input variables in the circuit of fig 1 in Sum of product form. (b)Consider the truth table. A───Inverter──┬─────NAND──────AND─────F │ ┌──┘ ┌──┘ ├─────OR────┤ B──┐ │ │ │ └──┐ AND──────│─────┘ AND─────G C──┘ │ │ │ │ │ │ D─────────NAND─┴──────────┘ Fig 1 11.(5%) Design the half adder (a) construct the truth table and give the simplified boolean expression (b) show the implementation (no more than 2 gates) 12.(10%) Design the excess-3 to BCD converter (a) Construct the truth table and give the simplified boolean expression (b) show the implementation (using AND-OR implementation). -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 61.228.120.127 ※ 編輯: pattrick 來自: 61.228.120.127 (11/30 17:26)