課程名稱︰計算機概論
課程性質︰必修
課程教師︰黃乾綱
開課學院:工學院
開課系所︰工程科學與海洋工程學系
考試日期(年月日)︰97/1/14
考試時限(分鐘):150分鐘
是否需發放獎勵金:是
(如未明確表示,則不予發放)
試題 :
Please explain your answer as clearly as possible. Do NOT provide your final
result ONLY. (4% for each question)
1. (Chap 5) What are the two operations of memory subsystem? What are the two
registers in the memory subsystem? Describe the details of these
two operations.
2. (Chap 5) What is direct memory access (DMA)? And how does it work?
3. (Chap 5) A simple CPU provides 32 operations and has 8 registers (16-bit).
This CPU is connected to 256MB memory. What is the size of data
bus, address bus, and control bus?
4. (Chap 5) According to following equations, compare the CISC and RISC in
values of (a), (b),(c). Describe why RISC can perform better than
CISC
time time cycles instructions
──── = ──── ×────── ×──────
program cycle instruction program
(d) (a) (b) (c)
5. (chap 5) What are temporal locality and spatial locality?
6. (chap 5) One CPU need 5 ns to access one data in cache, and 50 ns to access
the data in main memory. In average case, the hit rate of this
computer is about 95%. What is the average memory access time?
7. (Chap 5) What is machine cycle? Describe the each step of machine cycle.
8. (Chap 5) Given the following picture. Excute the program in the memory. How
do the values change in all registers (R1, R2, R3, I, PC) while
executing the 4 instructions from address 070~073?
Data bus
__________________
∣ ∣
∣ ∣
————— ————————
∣ ∣R1 070∣ Load 200 R1 ∣
————— ————————
————— ————————
∣ ∣R2 071∣ Load 201 R2 ∣
————— ————————
————— ————————
∣ ∣R3 072∣ Add R1 R2 R3 ∣
————— ————————
————— ————————
∣ ∣I 073∣ Store 202 R3∣
————— ————————
∣ .
─────┘ .
.
————————
200∣ +47 ∣
————————
————————
201∣ -19 ∣
————————
————— ————————
∣ ∣PC 202∣ ∣
————— ————————
∣ ∣
∣____________∣
Address Bus
9. (Chap 6) The IP addresses of NTU 140.112.*.*. Assume all IP can assign to
computers, how many computers can be assigned with IP address start
with 140.112?
10.(Chap 6) An engineer notices that the data received by computers at two ends
of a bus LAN contain many errors. What do you think is the problem?
What can be done to solve the problem? If we found a large amount
of traffic on a long bus LAN. What can be done to alleviate the
situation?
11.(Chap 6)(12%)
______________________________________
Descriptions Options
 ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄
The_(1)_layer is responsible for node to node delivery of (a)Application
a frame between two adjacent stations. (b)Presentation
The_(2)_layer is designed to control the dialog between (c)Session
users. (d)Transport
The_(3)_layer is responsible for transmitting a bit stream (e)Network
over physical medium. (f)Data link
The_(4)_layer organize bits into logical units called frame. (g)Physical
The_(5)_layer is concerned with the syntax and semantics of
the information exchanged between two systems.
The_(6)_layer is responsible for source to destination
(end-to-end) delivery of the entire message.
The_(7)_layer enables the user to access the network.
Bridge operate at the_(8)_layers of the OSI model. (multiple choices)
Routers operate at the_(9)_layers of the OSI model. (multiple choices)
IP (Internet Protocol) defined at the_(10)_layer.
TCP and UDP defined at the_(11)_layer.
HTTP,FTP,Telnet are protocol of_(12)_layer.
 ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄
12.(Chap 7) A multiprogramming operating system uses paging. The available
memory is 16 MB, and each frame is 512 KB. The first program needs
2657KB. The second program needs 5867 KB. The third program needs
3845 KB.
a. How many frame are unused?
b. How many memory is wasted in internal fragmentation?
13.(Chap 7) Give a real world example of deadlock, and describe the four
necessary conditions in your deadlock example (list the four
necessary conditions).
14.(Chap 7)(8%) Given the following state diagram of process management. Please
give the name of states (A) (B) (C) and explain the situations (1)
(2) (3), at what condition the process will leave running state or
waiting state.
| |
Process | |
↓ ↓
————— Get access to CPU —————
| (A) ︱──────────→| (B) ∣
————— —————
↖ ↖__________╱ ╱
╲ (1) ╱
╲ ╱
(3) ╲ ╱(2)
╲ ╱
╲ ╱
╲ ↙
—————
∣ (C) ∣
—————
15.(Chap 7) What is Dining Philosopher problem? At what situation the deadlock
will happen? At what situation the starvation will happen?
16.(Chap 7) What's the difference between page and frame? what's the difference
between paging and demand paging? What is page swapping?
17.(Chap7 ) a. Which one is not the responsibility of device manager?
(A) assure the device is functioning properly (B) maintain job
queue for devices (C) control the policies for device
accessing (D) backup data in disk.
b. Which one is not the responsibility of file manager?
(A) control the file read/write (B) control the naming of file
(C) print the file (D) supervise the file modification.
18.(Chap 8) Please design a recursive algorithm to implement the following
function:
︴0 ,if n=0
Fibonaci sequence: fib(n)=︴1 ,if n=1
︴fib(n-2)+fib(n-1) ,if n≧2
19.(Chap 8) Please describe the process of Bubble Sort algorithm, and use the
Bubble Sort to sort the following sequence, step by step.[25, 68,
8, 12, 54, 28, 37, 5].
20.(Chap 8) What is the formal definition of algorithm? What are the three
constructs used in algorithms design?
21.(Chap 9) What is the difference between assembler amd compiler?
22.(Chap 9) Why do we need the linking process after compiling the source code?
--
※ 發信站: 批踢踢實業坊(ptt.cc)
◆ From: 140.112.242.203