課程名稱︰積體電路設計
課程性質︰選修
課程教師︰闕智達
開課學院：電機資訊學院
開課系所︰電機系
考試日期（年月日）︰2006/1/11
考試時限（分鐘）：120
是否需發放獎勵金：是
（如未明確表示，則不予發放）
試題 :
1.Explain or answer the following(5% each)
(a)Clock skew and its effect on system performance
(b)Explain the difference between a latch and a flip-flop(register)
(c)Draw the schematic of H-tree clock distribution scheme
(d)Draw the blockdiagram of the 8-bitcarry adder
(e)Draw the 6-T XOR gate circuit
(f)Why reading DRAM cell is destructive?
(g)Draw the 9-T content addressable memory cell circuit
(h)Explain how a phase locked loop can be used to multiply the input frequency
2.In a finite -impluse response (FIR) filter,there is a need to add six numbers
(all of them are 6-bit 2's complement numbers).We can use a multiple-input
adder to add all of them.
(a)Design and draw the diagram of a Wallance-tree type multiple-input adder
using full adders (note the sign extension)(10&)
(b)How can the sign extension part be simplified?
3.(a) Design a circuit that computes the signal "A grater than B",when A>B
and "0" otherwise. A,B are both 4-bit 2's complement numbers. Let A be
A3A2A1A0 ,and B be B3B2B1B0 with A3 and B3 being the MSBs(8%)
(b)Write a verilog module for the circuit in (a). Note that you can only use
the following standard cell:FA(full adder) and other simple logic cells,such
as AND,OR,XOR,etc. You must define these cells befour you use them.(7%)
4.For the circuit shown in the right (課本 圖10.19-(a))
(a)Give its name (3%)
(b)Explain all variables(there are 11) (6%)
(c)Explain its function (6%)
5.For the circuit of a NAND-type ROM.(課本圖11.41) Draw the circuit diagram
of a NOR-type ROM with the same function. Use the same variable in your diagram.
6.We have shown in class that how can we implement "shift register". Note that
the SRAM used is a dual port SRAM.It is usually more economic to use
single-port SRAM.Design a shift register with the same function as Fig2(課本圖
11.43-(b)) that quses only single-port SRAM.(10%)
Note :A single port SRAM can either read a word or write a word in one clock
cycle.
Hint:You may need two single-port SRAM modules. Each of them contains only
half the number of word as in the dual-port SRAM in Fig2
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※ 編輯: overflow2 來自: 140.112.174.136 (01/17 18:54)