→ leoone: 可以拍一下課本嗎 記得那附近有一題張凡答案給錯的 11/23 21:07
已補
→ E33258: 你ins%那邊應該要是1.36，題目雖然沒講但應該是採用組合 11/23 22:40
→ E33258: 式快取 11/23 22:40
喔喔喔用組合式快取就可以理解了 沒想到這點
※ 編輯: kerkercheng (140.112.253.206), 11/23/2017 23:40:54
補圖
https://imgur.com/0lv5B0N.jpg
https://imgur.com/lKcdBRB.jpg
我把題目打上來
Assume that main memory accesses take 70ns and that memory accesses are 36%
of all instructions. The following table shows data for L1 caches attached to
each of two processors P1 and P2.
L1 size L1 miss rate L1 hit time
P1 1KB 11.4% 0.62 ns
P2 2KB 8.0% 0.66 ns
(1) Assuming that the L1 hit time determines the cycle times for P1 and P2 ,
What are their respective clock rates?
(2) What is the AMAT for each of P1 and P2?
(3) Assuming a base CPI of 1.0 , what is the total CPI for each of P1 and P2?
Which processor is faster?
我想問的是第三小題
張凡的解答是寫
CPI(P1) = 1 + (1.36*0.114*70/0.62)
CPI(P2) = 1 + (1.36*0.08*70/0.66)
這邊我有點疑問
我的想法是 總CPI應該是(我只寫P1)
1 + 0.36 * 0.114 * 70/0.62 = 5.6335
base ins% miss rate miss penalty cycle
但答案卻不是這樣
其實我有點搞不清楚base CPI的定義
如果我用下面另外一個算法
1 + 0.36 * (1-0.114) * 1 + 0.36 * 0.114 * 70/0.62 呢
base ins% hit rate hit cycle ins% miss rate miss penalty
這個算法我把它想成如果cache有hit時間也是要額外加上去
雖然我覺得這個好像不太對
但還是上來問問(沒上過正課QQ)
謝謝大家
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