推 trees880098 : 收電機 02/09 17:27
課程名稱︰電子學一
課程性質︰必修
課程教師︰呂良鴻
開課學院：電機資訊學院
開課系所︰電機工程學系
考試日期（年月日）︰103/12/26
考試時限（分鐘）：50分鐘
試題 :
Microelectronic Circuits I (Quiz 2)
date: 2014/12/26 (Fri)
time: 14:20~15:10
1. (50%) Figure shows an amplifier in which the load resistor R_D has been
replaced with another NMOS transistor Q2 connected as a two-terminal device.
Note that because V_DG of Q2 is zero, it will be operating in saturation at
all times, even when V_i = 0 and i_D2 = i_D1 = 0. Note also that the two
transistors conduct equal drain currents. Using i_D1 = i_D2, show that for
the range of v1 over which Q1 is operating in saturation, that is, for
V_t1 ≦ v_I ≦ v_O + V_t1
the output voltage will be given by
http://ppt.cc/1JsL
where we have assumed V_t1 = V_t2 = V_t. Thus the circuit functions as a
linear amplifier, even for large input signals. For (W/L)_1 = (5um/0.5um)
and (W/L)_2 = (5um/0.5um), find the voltage gain.
http://ppt.cc/k1k1
2. The bias circuit of figure is used in a design with V_G = 5V and R_S = 1kΩ.
For an enhancement MOSFET with k'_n(W/L) = 2mA/V^2 the source voltage was
measured and found to be 2 V. What must V_t be for this device? If a device
for which V_t is 0.5 V less is used, what does V_S become? What bias current
results?
http://ppt.cc/jlNZ
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