推 h816090: 一年工作經驗這錢還不錯 01/10 22:18
推 bless0621: 但發展性就這樣 01/11 01:27
推 neolin08: 樓上，那樣是哪樣? 01/11 16:33
推 tingiy: 因為SI就那樣吧 01/11 21:09
推 bless0621: 就只是模擬別人設計好的東西。就是這樣 01/11 23:34
Job Description
1 Chip-Package-PCB channel simulation to validate package design
1.1 Package/PCB model extraction
1.2 Power integrity (PI) channel simulation for core power
1.3 Signal integrity (SI) and PI channel simulation for high speed
interfaces such as DDR, SerDes, PCIe et al.
2 Package/PCB layout review and co-design
2.1 Package/PCB layout review
2.2 Provide design guidelines for PI/SI optimization
3 Other assignments and tasks
3.1 Project management
3.2 Operation assistance
Requirements:
1 Enthusiastic, proactive, responsible, and has integrity
2 A Bachelor degree or a Master degree in Electrical Engineering
3 At least one year working experience on SI/PI simulation
4 Used SIWave and HFSS before. Familarity with Cadence APD is a plus
Company Offers
1 Competitive salary and bonus
2 Solid training
3 Restrict-less career opportunity in company
4 Annual vacation allowance
Working Hours: Monday - Friday. 8:30AM - 17:30PM with 15 minutes flexibility
Working Location: Jingmei, Taipei
Montly salary: NTD55K - NTD90K
Please send your resume to: julia.lin@sarcina-tech.com
Company website: http://www.sarcinatech.com/
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